- Generated on Sat May 30 2026 11:09:58 for Voxia OS by
1.13.2
|
Voxia OS v0.0.1
Hobby Project Operating System Targeting x86-64
|
Go to the source code of this file.
Data Structures | |
| struct | xhci_cap_regs |
| struct | xhci_op_regs |
| struct | xhci_intr_regs |
| struct | xhci_runtime_regs |
| struct | xhci_trb |
| struct | xhci_slot_ctx |
| struct | xhci_endpoint_ctx |
| struct | xhci_device_ctx |
| struct | xhci_input_control_ctx |
| struct | xhci_input_ctx |
| class | XHCIModule |
| struct | XHCIModule::xhci_slot |
| struct | XHCIModule::xhci_erst_entry |
Macros | |
| #define | XHCI_VENDOR_ID 0x1b36 |
| #define | XHCI_DEVICE_ID 0x000d |
| #define | XHCI_PORT_CCS (1 << 0) |
| #define | XHCI_PORT_PED (1 << 1) |
| #define | XHCI_PORT_PR (1 << 4) |
| #define | XHCI_PORT_PLS_MASK (0xF << 5) |
| #define | XHCI_PORT_PP (1 << 9) |
| #define | XHCI_PORT_SPEED_MASK (0xF << 10) |
| #define | XHCI_PORT_CSC (1 << 17) |
| #define | XHCI_PORT_PRC (1 << 21) |
| #define | XHCI_CMD_RS (1 << 0) |
| #define | XHCI_CMD_HCRST (1 << 1) |
| #define | XHCI_CMD_INTE (1 << 2) |
| #define | XHCI_STS_HCH (1 << 0) |
| #define | XHCI_STS_CNR (1 << 11) |
| #define | XHCI_TRB_NORMAL 1 |
| #define | XHCI_TRB_SETUP_STAGE 2 |
| #define | XHCI_TRB_DATA_STAGE 3 |
| #define | XHCI_TRB_STATUS_STAGE 4 |
| #define | XHCI_TRB_LINK 6 |
| #define | XHCI_TRB_ENABLE_SLOT_CMD 9 |
| #define | XHCI_TRB_ADDRESS_DEVICE_CMD 11 |
| #define | XHCI_TRB_CONFIGURE_ENDPOINT_CMD 12 |
| #define | XHCI_TRB_TRANSFER_EVENT 32 |
| #define | XHCI_TRB_COMMAND_COMPLETION_EVENT 33 |
| #define | XHCI_TRB_PORT_STATUS_CHANGE_EVENT 34 |
Functions | |
| struct xhci_cap_regs | __attribute__ ((packed)) |
Variables | |
| uint8_t | caplength |
| uint8_t | reserved |
| uint16_t | hciversion |
| uint32_t | hcsparams1 |
| uint32_t | hcsparams2 |
| uint32_t | hcsparams3 |
| uint32_t | hccparams1 |
| uint32_t | dboff |
| uint32_t | rtsoff |
| uint32_t | hccparams2 |
| volatile uint32_t | usbcmd |
| volatile uint32_t | usbsts |
| volatile uint32_t | pagesize |
| uint32_t | reserved1 [2] |
| volatile uint32_t | dnctrl |
| volatile uint64_t | crcr |
| uint32_t | reserved2 [4] |
| volatile uint64_t | dcbaap |
| volatile uint32_t | config |
| volatile uint32_t | iman |
| volatile uint32_t | imod |
| volatile uint32_t | erstsz |
| volatile uint64_t | erstba |
| volatile uint64_t | erdp |
| volatile uint32_t | mfindex |
| struct xhci_intr_regs | ir [1024] |
| uint64_t | ptr |
| uint32_t | status |
| uint32_t | control |
| uint32_t | info |
| uint32_t | info2 |
| uint64_t | trdp |
| uint32_t | info3 |
| struct xhci_slot_ctx | slot |
| struct xhci_endpoint_ctx | ep [31] |
| uint32_t | drop_flags |
| uint32_t | add_flags |
| struct xhci_input_control_ctx | input_control |
| struct xhci_device_ctx | device |
| uint64_t | ba |
| uint32_t | size |
| XHCIModule | __attribute__ |
| #define XHCI_CMD_HCRST (1 << 1) |
Definition at line 66 of file xhci.hpp.
Referenced by XHCIModule::reset_controller().
| #define XHCI_CMD_RS (1 << 0) |
Definition at line 65 of file xhci.hpp.
Referenced by XHCIModule::init_controller(), and XHCIModule::reset_controller().
| #define XHCI_DEVICE_ID 0x000d |
Definition at line 9 of file xhci.hpp.
Referenced by XHCIModule::load().
| #define XHCI_PORT_CCS (1 << 0) |
Definition at line 55 of file xhci.hpp.
Referenced by XHCIModule::probe_ports().
| #define XHCI_PORT_PED (1 << 1) |
Definition at line 56 of file xhci.hpp.
Referenced by XHCIModule::probe_ports().
| #define XHCI_PORT_PR (1 << 4) |
Definition at line 57 of file xhci.hpp.
Referenced by XHCIModule::probe_ports().
| #define XHCI_STS_CNR (1 << 11) |
Definition at line 71 of file xhci.hpp.
Referenced by XHCIModule::reset_controller().
| #define XHCI_STS_HCH (1 << 0) |
Definition at line 70 of file xhci.hpp.
Referenced by XHCIModule::init_controller(), and XHCIModule::reset_controller().
| #define XHCI_TRB_ADDRESS_DEVICE_CMD 11 |
Definition at line 80 of file xhci.hpp.
Referenced by XHCIModule::address_device().
| #define XHCI_TRB_COMMAND_COMPLETION_EVENT 33 |
Definition at line 83 of file xhci.hpp.
Referenced by XHCIModule::address_device(), and XHCIModule::enable_slot().
| #define XHCI_TRB_DATA_STAGE 3 |
Definition at line 76 of file xhci.hpp.
Referenced by XHCIModule::send_async_with_response().
| #define XHCI_TRB_ENABLE_SLOT_CMD 9 |
Definition at line 79 of file xhci.hpp.
Referenced by XHCIModule::enable_slot().
| #define XHCI_TRB_SETUP_STAGE 2 |
Definition at line 75 of file xhci.hpp.
Referenced by XHCIModule::send_async_with_response().
| #define XHCI_TRB_STATUS_STAGE 4 |
Definition at line 77 of file xhci.hpp.
Referenced by XHCIModule::send_async_with_response().
| #define XHCI_TRB_TRANSFER_EVENT 32 |
Definition at line 82 of file xhci.hpp.
Referenced by XHCIModule::send_async_with_response().
| #define XHCI_VENDOR_ID 0x1b36 |
Definition at line 8 of file xhci.hpp.
Referenced by XHCIModule::load().
| struct xhci_cap_regs __attribute__ | ( | (packed) | ) |
| XHCIModule __attribute__ |
| volatile uint32_t config |
Definition at line 8 of file xhci.hpp.
Referenced by EHCIModule::probe().
| struct xhci_device_ctx device |
| struct xhci_endpoint_ctx ep[31] |
| uint32_t info |
Definition at line 0 of file xhci.hpp.
Referenced by ATAPIModule::identify().
| struct xhci_input_control_ctx input_control |
| struct xhci_intr_regs ir[1024] |
| uint64_t ptr |
Definition at line 0 of file xhci.hpp.
Referenced by __attribute__(), __attribute__(), check_redzone(), elf_gnu_hash_parse(), IOForge::IOUtils::free(), E1000Module::initReceiverX(), E1000Module::initTransmitterX(), interrupt_reload(), ioforge_free(), ioforge_memset(), iso9660_lookup(), kfree(), kfree2(), IOForge::IOUtils::memset(), memset(), operator new(), operator new[](), parse_multicore(), parsing_madt(), EHCIModule::probe(), setup_redzone(), ssfn_free_(), ssfn_realloc(), and vxPhysBaseFree().
| struct xhci_slot_ctx slot |
Definition at line 0 of file xhci.hpp.
Referenced by irq_register(), AHCIModule::issue_and_wait(), pool_push(), and AHCIModule::port_reset().
| uint32_t status |
Definition at line 1 of file xhci.hpp.
Referenced by XHCIModule::probe_ports().
1.13.2